In other words, i want to pass some arguments which will eventually become variables in the makefile. I usually pass macro definitions from make command line to a makefile using the option: I want to use the make command as part of setting up the code environment, but i'm using windows.
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The language accepted by gnu make is a superset of the one supported by the traditional make utility.
Can i pass variables to a gnu makefile as command line arguments?
For variable assignment in make, i see := and = operator. What's the difference between them? The error that you've quoted must have been preceded by an error from gcc, please quote that as well. Msys2 have many types of runtime and they.
+ i was not familar. Cd subdir && $(make) the value of this variable is the file name with which make was invoked. The definition is accessible inside the makefile.
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